Monday, January 31, 2011

Artificial Intelligence

 It is the science and engineering of making intelligent machines, especially intelligent computer programs. It is related to the similar task of using computers to understand human intelligence.

Saturday, January 29, 2011

Asynchronous Decade Counters

The binary counters  introduced  in previous post have two to the power n states.  But counters with states less than this number are also possible.  They are designed to have the number of states in their sequences, which are called truncated sequences.  These sequences are achieved by forcing the counter to recycle before going through all of its normal states. A common modulus for counters with truncated sequences is ten.  A counter with ten states in its sequence is called a decade counter.  The circuit below is an implementation of a decade counter.


Once the counter counts to ten (1010), all the flip-flops are being cleared.  Notice that only Q1 and Q3 are used to decode the count of ten.  This is called partial decoding, as none of the other states (zero to nine) have both Q1 and Q3 HIGH at the same time. The sequence of the decade counter is shown in the table below:
Sequence

Asynchronous (Ripple) Counters

A two-bit asynchronous counter is shown below.  The external clock is connected to the clock input of the first flip-flop (FF0) only.  So, FF0 changes state at the falling edge of each clock pulse, but FF1 changes only when triggered by the falling edge of the Q output of FF0.  Because of the inherent propagation delay through a flip-flop, the transition of the input clock pulse and a transition of the Q output of FF0 can never occur at exactly the same time.  Therefore, the flip-flops cannot be triggered simultaneously, producing an asynchronous operation.

2-bit Asynchronous Counter

Note that for simplicity, the transitions of Q0, Q1 and CLK in the timing diagram above are shown as simultaneous even though this is an asynchronous counter.  Actually, there is some small delay between the CLK, Q0 and Q1 transitions.

Usually, all the CLEAR inputs are connected together, so that a single pulse can clear all the flip-flops before counting starts.  The clock pulse fed into FF0 is rippled through the other counters after propagation delays, like a ripple on water, hence the name Ripple Counter.
 
The 2-bit ripple counter circuit above has four different states, each one corresponding to a count value.  Similarly, a counter with n flip-flops can have 2 to the power n states.  The number of states in a counter is known as its mod (modulo) number.  Thus a 2-bit counter is a mod-4 counter.

The following is a three-bit asynchronous binary counter  and its timing diagram for one cycle.  It works exactly the same way as a two-bit asynchronous binary counter mentioned above, except it has eight states due to the third flip-flop.
3-bit Asynchronous Binary Counter

Friday, January 28, 2011

Thought for the day

           A man is not finished when he is defeated.
                    He is finished when he quits.”

Indirect Addressing Technique

An address that serves as a reference point instead of the address to the direct location.
For example, if a programmer was writing something to an indirect address in memory, that data would be saved anywhere in the memory, instead of a specific address.


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Thursday, January 27, 2011

Direct Addressing technique

Direct addressing is so-named because the value to be stored in memory is obtained by directly retrieving it from another memory location.
For example:
MOV A,30h
This instruction will read the data out of Internal RAM address 30 (hexadecimal) and store it in the Accumulator.


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Thought for the day

“A man is but the product of his thoughts
what he thinks, he becomes.”

Tuesday, January 25, 2011

Thought for the day

“You can fool some of the people all of the time,
and all of the people some of the time,
but you can not fool all of the people all of the time.”

Simulation

Simulation is the imitation of some real thing or process. The act of simulating something generally entails representing certain key characteristics or behaviours of a selected physical or abstract system.


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Monday, January 24, 2011

Shift registers

Shift registers are a type of sequential logic circuit, mainly for storage of digital data.  They are a group of flip-flops connected in a chain so that the output from one flip-flop becomes the input of the next flip-flop.  Most of the registers possess no characteristic internal sequence of states.  All the flip-flops are driven by a common clock, and all are set or reset simultaneously.

There are varios types of Registers:-

Serial In - Serial Out
Serial In - Parallel Out
Parallel In - Serial Out
Parallel In - Parallel Out
Shift Register Counters
                          (i) Ring Counters
                          (ii) Johnson Counters

 

Addressing techniques

Addressing techniques refer to the way that data is referenced in an assembler instruction.
There are so many ways to do this  but the major types of addressing technique are:-

Immediate Addressing
Direct Addressing
Indirect Addressing


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Friday, January 21, 2011

Secure Electronic Transaction

SET incorporates the following features:
  • Confidentiality of information
  • Integrity of data
  • Cardholder account authentication
  • Merchant authentication


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Wednesday, January 19, 2011

Counters

It is a Sequential device that  stores (and sometimes displays) the number of times a particular event or process has occurred, often in relationship to a clock signal.
counters can be implemented quite easily using register-type circuits such as the flip flop and a wide variety of designs exist, e.g.:
  • Asynchronous (ripple) counter – changing state bits are used as clocks to subsequent state flip-flops
  • Synchronous counter – all state bits change under control of a single clock
  • Decade counter – counts through ten states per stage
  • Up–down counter – counts both up and down, under command of a control input
  • Ring counter – formed by a shift register with feedback connection in a ring
  • Johnson counter – a twisted ring counter
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Sunday, January 16, 2011

RS flip flop

In the R-S flip flop ..when
Both S and R inputs are equl to 1 than Output is in Indeterminate state...
This is the major drawback of RS flip flop.
we can see this by table 7.2


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Wednesday, January 12, 2011

Race around Condition

In jk Flip flop, the output is feedback to the input, and therefore change in the output causes the change in inputs. due to this in the postive half of the clock pulse if j and k both are high then the output toggles simultaneously. this condition is known as Race around condition.

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Tuesday, January 11, 2011

Multiplexer

Tuesday, January 11, 2011


A multiplexer, sometimes referred to as a "multiplexor" or simply "mux", is a device that selects between a number of input signals. In its simplest form, a multiplexer will have 2 to the power n inputs ,n selection lines and 1 output.




In above dia.C0 to C3 are inputs,.
A,B are selection lines and f(A,B,C).

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